1. Field of the Invention
The present invention relates to high density memory devices based on phase change based memory materials, including chalcogenide based materials and on other programmable resistive materials, and to methods for manufacturing such devices.
2. Description of Related Art
Phase change based memory materials are widely used in read-write optical disks. These materials have at least two solid phases, including for example a generally amorphous solid phase and a generally crystalline solid phase. Laser pulses are used in read-write optical disks to switch between phases and to read the optical properties of the material after the phase change.
Phase change based memory materials, like chalcogenide based materials and similar materials, also can be caused to change phase by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous state is characterized by higher electrical resistivity than the generally crystalline state, which can be readily sensed to indicate data. These properties have generated interest in using programmable resistive material to form nonvolatile memory circuits, which can be read and written with random access.
The change from the amorphous to the crystalline state is generally a lower current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or break down the crystalline structure, after which the phase change material cools quickly, quenching the phase change process, allowing at least a portion of the phase change structure to stabilize in the amorphous state. It is desirable to minimize the magnitude of the reset current used to cause transition of phase change material from the crystalline state to the amorphous state. The magnitude of the reset current needed for reset can be reduced by reducing the size of the phase change material element in the cell and of the contact area between electrodes and the phase change material, so that higher current densities are achieved with small absolute current values through the phase change material element.
A specific issue arising from conventional phase change memory and structures is the heat sink effect of conventional designs. FIG. 1 illustrates a cross-sectional view of a prior art memory cell having a bottom electrode 110 in a dielectric layer 100, a phase change kernel 120 on the bottom electrode 110, and a top electrode 130 on the phase change kernel 120. The conductive bottom electrode 110 acts as a heat sink, the high heat conductivity of the bottom electrode 110 rapidly drawing heat away from the phase change kernel 120. Because the phase change process of the kernel 120 occurs as a result of heating, the heat sink effect results in a requirement for higher current in order to effect the desired phase change.
FIG. 2 illustrates a cross-sectional view of a memory cell with a structure similar to that of FIG. 1, further including a seam 140 in the bottom electrode 110. As is known the art, deposition into a relatively high-aspect ratio opening, such as forming the bottom electrode 110 in an opening in dielectric layer 100, can result in the formation of seams 140 in the deposited material. Deposited material tends to cling to the sides of a receptacle structure, leaving voids or seams instead of a uniformly solid material. Because of its high conformity, tungsten is particularly susceptible to that phenomenon. A subsequent etching or Chemical Mechanical Polishing CMP step can open the seam, but nevertheless a seam can remain in the deposited structure. In such an instance, the subsequently deposited phase change kernel 120 may not make full contact with the bottom electrode 110, resulting in a poor contact and issues with memory cell stability and reliability.
Problems have arisen in manufacturing such devices with very small dimensions, and with variations in processes that meet the tight specifications needed for large-scale memory devices. It is desirable therefore to provide a memory cell structure having small dimensions and low reset currents, as well as a structure that addresses the heat conductivity problem, and methods for manufacturing such structure that meets tight process variation specifications needed for large-scale memory devices. Furthermore, it is desirable to produce memory devices having a small active phase change region.